Controllable integrator

ABSTRACT

Integrated circuitry for selectively introducing capacitance and for controlling the transconductance transfer function of one or more amplifiers includes concatenated differential amplifiers with one or more pairs of switchable capacitive components differentially connected across outputs of the differential amplifiers to facilitate operation over a wide range of operating frequencies under control of external signals.

Notice: More than one reissue application has been filed for the reissueof U.S. Pat. No. 5,805,006. The reissue applications are applicationSer. No. 09/609,007 (now U.S. Reissue Pat. No. RE37,739 ), applicationSer. No. 09/950,086 (now U.S. Reissue Pat. No. RE38,455 ) andapplication Ser. No. 10/614,084 (the present application), which is acontinuation U.S. Pat. No. RE37,739, which is a continuation of U.S.Pat. No. RE38,455, which is a reissue of U.S. Pat. No. 5,805,006.

FIELD OF THE INVENTION

This invention relates to integrators and more particularly to circuitryin an integrated circuit that controls frequency responsecharacteristics over a wide range of frequencies with adjustablecapacitance and controllable transconductance.

BACKGROUND OF THE INVENTION

Circuit components formed in integrated circuits commonly exhibit widevariations in operating characteristics attributable to variations inthe semiconductor processes that form the integrated circuit of suchcomponents. By traditional design practices, additional or redundantcomponents may be formed in an integrated circuit during the processingphase, and such additional components may thereafter be connected in orout of a circuit using a laser beam to selectively sever connectinglinks as required to adjust the operating characteristics of thecircuit. Alternatively, signal controllable switches may be incorporatedinto the design of the integrated circuit to selectively connectadditional components in response to externally applied control signals.However, such switches are not ideal in that they incorporateappreciable resistance into a circuit in the conductive state which canbe detrimental to high frequency operating characteristics of theintegrated circuit.

SUMMARY OF THE INVENTION

In accordance with one embodiment of the present invention, additionalcapacitive components may be selectively switched into circuitconfiguration in response to external control signals withoutintroducing significant resistance with the capacitive components. Inaddition, controllable gain elements may be selectively controlled toamplify the effectiveness of capacitive components in the circuit for awide range of operating frequency characteristics of the circuit asselectively configured.

DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of a conventional transconductanceintegrator;

FIG. 2 is a circuit diagram of one embodiment of the present invention;

FIG. 3 is a graph illustrating the operating characteristics of atransconductance amplifier; and

FIG. 4 is a circuit diagram of another embodiment of the presentinvention for providing wide dynamic control of operating frequencycharacteristics of the composite circuitry.

DETAILED DESCRIPTION OF THE INVENTION

Referring now to FIG. 1, there is shown a conventional integratorincluding a differential pair of gain stages 9, 11 such as field-effecttransistors having control electrodes, or gates, coupled to receivecontrol signals applied to inputs 13, 15. The source electrodes, orsources, of the gain stages are coupled together and to a controllablecurrent source 17, and each of the drain electrodes, or drains, iscoupled to a controllable current sources 19, 21 and to one or morecapacitive elements 23, 25. The sum of the current sources 19, 21 isusually set equal to the current from source 17. Selected ones of thecapacitive elements may be coupled to ground, for example, via linksthat may be removed via laser-beam machining to alter the operatingfrequency characteristics of the circuit. Alternatively, semiconductorswitches may be substituted (not shown) for the links to facilitatecontrol of capacitance in the circuit in response to externally appliedsignals. However, such semiconductor switches commonly introducesignificant resistance along with capacitance thus switched into thecircuit, and this adversely affects high frequency operatingcharacteristics of the circuit thus configured.

In accordance with one embodiment of the present invention, one or moredifferential pairs of capacitive elements are formed for selectiveconnection into the circuit in response to an applied control signal.Specifically, as shown in FIG. 2, each capacitive element is formed as apair of gain elements 27, 29 such as insulated-gate field-effecttransistors with source and drain connected in common as one capacitiveelectrode and with the gate forming another capacitive electrode. Thesource-drain connections are connected in common to a control switch 31that may also include a gain element responsive to an applied controlsignal for switching in or out the differential pair of capacitivecomponents 27, 29. Specifically, at low-level applied control signalappearing on control input 33 (representative of the ON condition forNMOS type transistors 27, 29) the source-drain connections formconductive channels in the region of the respective gates in knownmanner to form capacitive components differentially connected across theoutputs of the gain stages 35, 37. Thus, for each capacitive componentof capacitance C, the differential connection of such components yieldsC/2 capacitance, without the equivalent resistance 39 of a controlswitch (in the biasing circuit) affecting the capacitance in the circuitthus configured. At high-level applied control signal appearing oncontrol input 33 (representative of the OFF condition for NMOS typetransistors 27, 29), wide depletion regions form adjacent thesources-drains, or essentially no channels form in the vicinities of thegates to contribute only a small fraction of the original capacitanceintroduced into the circuit. One or more banks of differentiallyconnected capacitive components, each controlled by such bias-adjustingswitching circuitry, may be provided to facilitate adjustment or controlof the frequency response characteristics of the circuit thusconfigured.

Referring now to FIG. 3, there is shown a graph of the transfer functionof the differential amplifier of FIG. 2 that includes gain elements 35,37 and current sources 41, 43, 45 connected as shown. Specifically, asthe differential of the control voltages 47, 49 applied to the controlelectrodes increases, the differential of drain currents I₁, I₂(ΔI=I₁−I₂) increases, as shown by the curve 51. In the semiconductoramplifier circuit of FIG. 2, the sum of the drain currents 41, 43substantially equals the combined current 45, and reducing these currentlevels typically alters the transfer function of the semiconductoramplifier, as shown by curve 53. The range of control voltages 55 overwhich the transfer function remains substantially linear diminishes withreduced current levels, as illustrated with reference to curve 53. Thus,at low levels of the combined source currents through current source 45,the substantially linear range of the transfer function on appliedcontrol voltages is narrow, and widens 55 with increased current levels.However, for a given level of the combined currents through source 45,significant increases in applied signal voltages appearing at inputs 47,49 introduces significant non-linearity in the transfer function foroperation at applied signal levels beyond the substantially linear range55.

In accordance with another embodiment of the present invention, aplurality of amplifiers similar to the amplifier of FIG. 2 are assembledin parallel, as illustrated in FIG. 4, between the differential inputs47, 49 and the differential outputs 57, 59. Each of the amplifiers maybe selectively controlled, for example, via a controllable currentsource 45 that conducts the currents from the commonly connected sourcesin each amplifier. In this way, each of the amplifiers 61, 63, 65 may beselectively disabled or enabled to selectively expand the linear range55, 55′ of the combined transfer function. In addition, with one or morepairs of differentially connected capacitive components 27, 29 connectedacross the outputs 57, 59, the range of frequencies over which theintegrated circuit may be operated can be greatly increased, forexample, to over 6:1 for operations at about 40 MHz to about 270 MHz.Additionally, for selected values of capacitance C switched into thecircuit in the manner previously described, control of one or more ofthe current sources in the amplifiers 61, 63, 65 may thus be externallycontrolled to maintain the transconductance (g_(m)) to capacitance (C)ratio (g_(m)/C) substantially constant over a population of integratedcircuits thus configured, and for operation of a particular integratedcircuit with selected frequency response characteristics. Of course,various known semiconductor technologies such as bi-polar or NMOS orCMOS processes may be used to form integrated circuits includingamplifiers and capacitive components, as described above.

Therefore, one design of integrated circuit according to the presentinvention facilitates formation of g_(m)/C integrators operable over awide range of frequencies, with dynamic responses convenientlycontrollable by signals that may be internal or external to theintegrated circuit.

1. Integrator apparatus comprising: an amplifier including a pair ofoutputs and being responsive to differential input signals for producingdifferential output signals on the pair of outputs; and a pair ofcapacitive components connected to the pair of outputs and to a commonsource of first control signal, the capacitive components includinginsulated-gate, field-effect transistors having gates connected torespective ones of the pair of outputs and having sources and drainsconnected in common to receive said first control signal for alteringthe capacitance of each pair of capacitive component in response to thefirst control signal applied to the sources and drains thereof. 2.Integrator apparatus according to claim 1 comprising a plurality ofpairs of capacitive components, each including insulated-gate,field-effect transistors having gates connected to respective ones onthe pair of outputs and having sources and drains connected in common toreceive the first control signal therefor for altering the capacitanceof the capacitive components in response to the first control signalapplied to the sources and drains of each of the plurality of pairs ofcapacitive components.
 3. Integrator apparatus according to claim 2wherein the amplifier includes a plurality of differential amplifiers,each having a pair of outputs coupled in common to the plurality ofpairs of capacitive components, and each having a pair of inputsconnected in common to receive applied differential signals, at leastone of the plurality of differential amplifiers also having a transferfunction from inputs thereof to outputs thereof that is controllable inresponse to a second control signal applied thereto for altering thecombined transfer function of the plurality of differential amplifiersfrom the inputs thereof connected in common to the differential outputsthereof coupled in common in response to applied second control signal.4. Integrator apparatus according to claim 1 wherein said amplifierincludes a pair of field-effect transistors, each having a drainelectrode connected to respective ones of said pair of outputs, andhaving source electrodes connected in common, with the source and drainelectrodes of each transistor forming a conduction channel thereof, andtransistors having gate electrodes connected to receive the differentialinput signals applied thereto to alter the conduction channel thereof;and a current source connected to the drain electrode of eachtransistor, and another current source connected to the commonconnection of the source electrodes for conducting the sum of currentsin the conduction channels of the pair of transistors.
 5. Integratorapparatus according to claim 4 wherein said another current source isadjustable to alter the transfer function of the amplifier from the gateelectrodes to the pair of outputs thereof.
 6. Integrator apparatusaccording to claim 3 wherein the second control signal is adjusted tomaintain substantially constant the ratio of the transconductance of theamplifier to the capacitance provided by the capacitive components inresponse to first control signal applied thereto.
 7. An amplifierapparatus, comprising: a plurality of amplifier cells, wherein each ofthe plurality of amplifier cells includes (i) at least one first inputin communication with a common control voltage, (ii) a second input incommunication with a controllable current signal, and (iii) an output,wherein the plurality of amplifier cells are arranged in parallel,wherein the first input of each of the plurality of amplifier cells isin communication with the first inputs of other ones of the plurality ofamplifier cells, wherein the output of each of the plurality ofamplifier cells is in communication with the outputs of other ones ofthe plurality of amplifier cells, wherein each of the plurality ofamplifier cells has a transconductance from the first input thereof tothe output thereof, wherein each of the plurality of amplifier cells isselectively controllable in response to the controllable current signalapplied thereto to one of enable and disable each of the plurality ofamplifier cells for adjusting a combined transconductance of theplurality of amplifier cells from the first inputs thereof to theoutputs thereof, and wherein an adjustable capacitance is connected tothe output of each of the plurality of amplifier cells, the adjustablecapacitance includes a pair of gain elements, and the adjustablecapacitance is adjustable based on a control signal applied at a commonnode of the pair of gain elements.
 8. The amplifier apparatus of claim7, wherein each of the plurality of amplifier cells comprises at leastone transistor.
 9. The amplifier apparatus of claim 8, wherein each ofthe plurality of amplifier cells comprises a pair of transistors. 10.The amplifier apparatus of claim 9, wherein each pair of transistorscomprises (i) a pair of input terminals, (ii) a pair of outputterminals, and (iii) a pair of common terminals coupled to thecontrollable current signal, and wherein each of the amplifier cellsincludes first and second current sources respectively coupled to thepair of output terminals.
 11. The amplifier apparatus of claim 9,wherein each of the pairs of transistors includes gates coupled to acommon control voltage, and wherein said pairs of input and outputterminals include sources and drains coupled together.
 12. The amplifierapparatus of claim 7, wherein the transconductance of each of theplurality of amplifier cells is substantially identical.
 13. Theamplifier apparatus of claim 7, wherein the transconductance of at leastone of the plurality of amplifier cells is different than thetransconductance of other ones of the plurality of amplifier cells. 14.The amplifier apparatus of claim 6, wherein each of the plurality ofamplifier cells comprises a controllable current source that generatesthe controllable current signal to adjust the transconductance of theamplifier cell.
 15. The amplifier apparatus of claim 14, wherein thecontrollable current source of the amplifier cell is in communicationwith the second input.
 16. An amplifier device, comprising: a pluralityof amplifier cells, each of the plurality of amplifier cells comprisingat least one transistor, wherein the plurality of amplifier cells arearranged in parallel, wherein each of the plurality of amplifier cellsincludes an input terminal, wherein the input terminal of each of theplurality of amplifier cells is in communication with input terminals ofother ones of the plurality of amplifier cells, wherein each of theplurality of amplifier cells includes an output terminal, wherein theoutput terminal of each of the plurality of amplifier cells is incommunication with output terminals of other ones of the plurality ofamplifier cells, and wherein each of the plurality of amplifier cellshas a transconductance from an input thereof to an output thereof; andmeans for selectively controlling each of the plurality amplifier cellsto enable at least one of the plurality of amplifier cells for adjustinga combined transconductance of the amplifier device in response to acontrollable current signal, wherein an adjustable capacitance isconnected to the output of each of the plurality of amplifier cells, theadjustable capacitance includes a pair of gain elements, and theadjustable capacitance is adjustable based on a control signal appliedat a common node of the pair of gain elements.
 17. The amplifier deviceof claim 16, wherein each of the plurality of amplifier cells comprisesa pair of transistors.
 18. The amplifier device of claim 17, whereineach pair of transistors comprises (i) a pair of input terminals, (ii) apair of output terminals, and (iii) a pair of common terminals connectedtogether, and wherein each of the amplifier cells includes first andsecond current sources respectively coupled to the pair of outputterminals.
 19. The amplifier device of claim 17, wherein each of thepairs of transistors includes gates coupled to respective controlsignals, and wherein each of the pairs of transistors includes sourcesand drains coupled together to receive the controllable current signal.20. The amplifier device of claim 16, wherein the transconductance ofeach of the plurality of amplifier cells is substantially identical. 21.The amplifier device of claim 16, wherein the transconductance of atleast one of the plurality of amplifier cells is different than thetransconductance of other ones of the plurality of amplifier cells. 22.An amplifier device, comprising: a plurality of amplifier cells, whereineach of the plurality of amplifier cells comprises: a pair of gainelements, wherein each of the pair of gain elements comprises: i.) apair of input terminals, ii.) a pair of output terminals, and iii.) apair of common terminals connected together in communication with acontrollable current signal, wherein the plurality of amplifier cellsare arranged in parallel, wherein each of the pair of input terminals ofthe plurality of amplifier cells are in communication with a controlvoltage and with the pairs of input terminals of other ones of theplurality of amplifier cells, wherein each of the pair of outputterminals of the plurality of amplifier cells are in communication withthe pairs of output terminals of other ones of the plurality ofamplifier cells, wherein each of the plurality of amplifier cells has atransconductance from the input thereof to the output thereof, whereineach of the plurality of amplifier cells is selectively controllable inresponse to the controllable current signal applied thereto to one ofenable and disable each of the plurality of amplifier cells foradjusting a combined transconductance of the plurality of amplifiercells, and wherein an adjustable capacitance is connected to the outputof each of the plurality of amplifier cells, the adjustable capacitanceincludes a pair of gain elements, and the adjustable capacitance isadjustable based on a control signal applied at a common node of thepair of gain elements.
 23. The amplifier device of claim 22, whereineach of the pair of gain elements comprises a pair of transistors. 24.The amplifier device of claim 23, wherein each of the pairs oftransistors includes gates coupled to the control voltage, and whereineach of the pairs of transistors includes sources and drains coupledtogether to receive the controllable current signal.
 25. The amplifierdevice of claim 22, wherein each of the amplifier cells includes firstand second current sources respectively coupled to the pair of outputterminals.
 26. The amplifier device of claim 22, wherein thetransconductance of each of the plurality of amplifier cells issubstantially identical.
 27. The amplifier device of claim 22, whereinthe transconductance of at least one of the plurality of amplifier cellsis different than the transconductance of other ones of the plurality ofamplifier cells.
 28. The amplifier device of claim 22, wherein each ofthe plurality of amplifier cells comprises a controllable current sourcethat generates the controllable current signal to adjust thetransconductance of the amplifier cell.
 29. The amplifier apparatus ofclaim 28, wherein the controllable current source in each of theplurality of amplifier cells is in communication with the correspondingpair of common terminals in each of the plurality of amplifier cells.30. A method of controlling an amplifier apparatus, comprising the stepsof: providing a plurality of amplifier cells, wherein each of theplurality of amplifier cells includes (i) at least one first input incommunication with a common control voltage, (ii) a second input incommunication with a controllable current signal, and (iii) an output,wherein the plurality of amplifier cells are arranged in parallel,wherein the first input of each of the plurality of amplifier cells isin communication with the first inputs of other ones of the plurality ofamplifier cells, wherein the output of each of the plurality ofamplifier cells is in communication with the outputs of other ones ofthe plurality of amplifier cells, and wherein each of the plurality ofamplifier cells has a transconductance from the first input thereof tothe output thereof; receiving the controllable current signal at thesecond inputs of each of the plurality of amplifier cells; selectivelycontrolling each of the plurality of amplifier cells in response to thereceived controllable current signal to one of enable and disable eachof the plurality of amplifier cells to adjust a combinedtransconductance of the plurality of amplifier cells from the firstinputs thereof to the outputs thereof; and providing an adjustablecapacitance connected to the output of each of the plurality ofamplifier cells, wherein the adjustable capacitance includes a pair ofgain elements, and the adjustable capacitance is adjustable based on acontrol signal applied at a common node of the pair of gain elements.31. The method of claim 30, wherein each of the plurality of amplifiercells includes at least one transistor.
 32. The method of claim 30,wherein the transconductance of each of the plurality of amplifier cellsis substantially identical.
 33. The method of claim 30, wherein thetransconductance of at least one of the plurality of amplifier cells isdifferent than the transconductance of other ones of the plurality ofamplifier cells.
 34. A method of controlling an amplifier device,comprising the steps of: providing a plurality of amplifier cells, eachof the plurality of amplifier cells including at least one transistor,wherein each of the plurality of amplifier cells includes an inputterminal, wherein each of the plurality of amplifier cells includes anoutput terminal, and wherein each of the plurality of amplifier cellshas a transconductance from an input thereof to an output thereof;arranging the plurality of amplifier cells in parallel, wherein theinput terminal of each of the plurality of amplifier cells is incommunication with the input terminals of other ones of the plurality ofamplifier cells, and wherein the output terminal of each of theplurality of amplifier cells is in communication with the outputterminals of other ones of the plurality of amplifier cells; selectivelycontrolling each of the plurality amplifier cells to enable at least oneof the plurality of amplifier cells to adjust a combinedtransconductance of the amplifier device in response to a controllablecurrent signal; and providing an adjustable capacitance connected to theoutput of each of the plurality of amplifier cells, wherein theadjustable capacitance includes a pair of gain elements, and theadjustable capacitance is adjustable based on a control signal appliedat a common node of the pair of gain elements.
 35. The method of claim34, wherein the transconductance of each of the plurality of amplifiercells is substantially identical.
 36. The method of claim 34, whereinthe transconductance of at least one of the plurality of amplifier cellsis different than the transconductance of other ones of the plurality ofamplifier cells.
 37. A method for controlling an amplifier device,comprising the steps of: providing a plurality of amplifier cells,wherein each of the plurality of amplifier cells comprises: a pair ofgain elements, wherein each of the pair of gain elements comprises: i.)a pair of input terminals, ii.) a pair of output terminals, and iii.) apair of common terminals connected together in communication with acontrollable current signal, wherein each of the plurality of amplifiercells has a transconductance from the input thereof to the outputthereof; arranging the plurality of amplifier cells in parallel;arranging each pair of input terminals of the plurality of amplifiercells in common with the pairs of input terminals of other ones of theplurality of amplifier cells; arranging each pair of output terminals ofthe plurality of amplifier cells in common with the pairs of outputterminals of other ones of the plurality of amplifier cells; selectivelycontrolling each of the plurality of amplifier cells in response to thecontrollable current signal applied thereto to one of enable and disableeach of the plurality of amplifier cells to adjust a combinedtransconductance of the plurality of amplifier cells; and providing anadjustable capacitance connected to the output of each of the pluralityof amplifier cells, wherein the adjustable capacitance includes a pairof gain elements, and the adjustable capacitance is adjustable based ona control signal applied at a common node of the pair of gain elements.38. The method of claim 37, wherein the transconductance of each of theplurality of amplifier cells is substantially identical.
 39. The methodof claim 37, wherein the transconductance of at least one of theplurality of amplifier cells is different than the transconductance ofother ones of the plurality of amplifier cells.
 40. An amplifierapparatus, comprising: means for providing a plurality of amplifiercells, wherein each of the plurality of amplifier cells includes (i) atleast one first input in communication with a common control voltage,(ii) a second input in communication with a controllable current signal,and (iii) an output, wherein the plurality of amplifier cells arearranged in parallel, wherein the first input of each of the pluralityof amplifier cells is in communication with the first inputs of otherones of the plurality of amplifier cells, wherein the output of each ofthe plurality of amplifier cells is in communication with the outputs ofother ones of the plurality of amplifier cells, and wherein each of theplurality of amplifier cells has a transconductance from the first inputthereof to the output thereof; means for receiving the control signal ateach of the plurality of amplifier cells; and means for selectivelycontrolling each of the plurality of amplifier cells in response to thereceived controllable current signal to one of enable and disable eachof the plurality of amplifier cells to adjust a combinedtransconductance of the plurality of amplifier cells from the firstinputs thereof to the outputs thereof, wherein an adjustable capacitanceis connected to the output of each of the plurality of amplifier cells,the adjustable capacitance includes a pair of gain elements, and theadjustable capacitance is adjustable based on a control signal appliedat a common node of the pair of gain elements.
 41. The amplifierapparatus of claim 40, wherein each of the plurality of amplifier cellscomprises at least one transistor.
 42. The amplifier apparatus of claim40, wherein the transconductance of each of the plurality of amplifiercells is substantially identical.
 43. The amplifier apparatus of claim40, wherein the transconductance of at least one of the plurality ofamplifier cells is different than the transconductance of other ones ofthe plurality of amplifier cells.
 44. An amplifier device, comprising:means for providing a plurality of amplifier cells, each of theplurality of amplifier cells including at least one transistor, whereineach of the plurality of amplifier cells includes an input terminal,wherein each of the plurality of amplifier cells includes an outputterminal, and wherein each of the plurality of amplifier cells has atransconductance from an input thereof to an output thereof; means forarranging the plurality of amplifier cells in parallel, wherein theinput terminal of each of the plurality of amplifier cells is incommunication with the input terminals of other ones of the plurality ofamplifier cells, and wherein the output terminal of each of theplurality of amplifier cells is in communication with the outputterminals of other ones of the plurality of amplifier cells; and meansfor selectively controlling each of the plurality amplifier cells toenable at least one of the plurality of amplifier cells to adjust acombined transconductance of the amplifier device in response to acontrollable current signal, wherein an adjustable capacitance isconnected to the output of each of the plurality of amplifier cells, theadjustable capacitance includes a pair of gain elements, and theadjustable capacitance is adjustable based on a control signal appliedat a common node of the pair of gain elements.
 45. The method of claim44, wherein the transconductance of each of the plurality of amplifiercells is substantially identical.
 46. The method of claim 44, whereinthe transconductance of at least one of the plurality of amplifier cellsis different than the transconductance of other ones of the plurality ofamplifier cells.
 47. An amplifier device, comprising: means forproviding a plurality of amplifier cells, wherein each of the pluralityof amplifier cells comprises: a pair of gain elements, wherein each ofthe pair of gain elements comprises: i.) a pair of input terminals, ii.)a pair of output terminals, and iii.) a pair of common terminalsconnected together in communication with a controllable current signal,wherein each of the plurality of amplifier cells has a transconductancefrom the input thereof to the output thereof; means for arranging theplurality of amplifier cells in parallel; means for arranging each pairof input terminals of the plurality of amplifier cells in common withthe pairs of input terminals of other ones of the plurality of amplifiercells; means for arranging each pair of output terminals of theplurality of amplifier cells in common with the pairs of outputterminals of other ones of the plurality of amplifier cells; and meansfor selectively controlling each of the plurality of amplifier cells inresponse to the controllable current signal applied thereto to one ofenable and disable each of the plurality of amplifier cells to adjust acombined transconductance of the plurality of amplifier cells, whereinan adjustable capacitance is connected to the output of each of theplurality of amplifier cells, the adjustable capacitance includes a pairof gain elements, and the adjustable capacitance is adjustable based ona control signal applied at a common node of the pair of gain elements.48. The method of claim 47, wherein the transconductance of each of theplurality of amplifier cells is substantially identical.
 49. The methodof claim 47, wherein the transconductance of at least one of theplurality of amplifier cells is different than the transconductance ofother ones of the plurality of amplifier cells.
 50. An amplifierapparatus, comprising: a plurality of amplifier cell means, wherein eachof the plurality of amplifier cell means includes (i) at least one firstinput in communication with a common control voltage, (ii) a secondinput in communication with a controllable current signal, and (iii) anoutput, wherein the plurality of amplifier cell means are arranged inparallel, wherein the output of each of the plurality of amplifier cellmeans is in communication with the outputs of other ones of theplurality of amplifier cell means, wherein the first input of each ofthe plurality of amplifier cell means is in communication with the firstinputs of other ones of the plurality of amplifier cell means, whereineach of the plurality of amplifier cell means has a transconductancefrom the first input thereof to the output thereof, wherein each of theplurality of amplifier cell means is selectively controllable inresponse to the controllable current signal applied thereto to one ofenable and disable each of the plurality of amplifier cell means foradjusting a combined transconductance of the plurality of amplifier cellmeans from the first inputs thereof to the outputs thereof, and whereinan adjustable capacitance is connected to the output of each of theplurality of amplifier cell means, the adjustable capacitance includes apair of gain elements, and the adjustable capacitance is adjustablebased on a control signal applied at a common node of the pair of gainelements.
 51. An amplifier device, comprising: a plurality of amplifiercell means, each of the plurality of amplifier cell means comprising atleast one transistor, wherein the plurality of amplifier cell means arearranged in parallel, wherein each of the plurality of amplifier cellmeans includes an input terminal, wherein the input terminal of each ofthe plurality of amplifier cell means is in communication with inputterminals of other ones of the plurality of amplifier cell means,wherein each of the plurality of amplifier cell means includes an outputterminal, wherein the output terminal of each of the plurality ofamplifier cell means is in communication with output terminals of otherones of the plurality of amplifier cell means, and wherein each of theplurality of amplifier cell means has a transconductance from an inputthereof to an output thereof; and means for selectively controlling eachof the plurality amplifier cell means to enable at least one of theplurality of amplifier cell means for adjusting a combinedtransconductance of the amplifier device in response to a controllablecurrent signal, wherein an adjustable capacitance is connected to theoutput of each of the plurality of amplifier cell means, the adjustablecapacitance includes a pair of gain elements, and the adjustablecapacitance is adjustable based on a control signal applied at a commonnode of the pair of gain elements.
 52. An amplifier apparatus with acontrollable Gm, comprising: a plurality of Gm cells, wherein each ofthe plurality of Gm cells includes (i) at least one first input incommunication with a common control voltage, (ii) a second input incommunication with a controllable current signal, and (iii) an output,wherein the plurality of Gm cells are arranged in parallel, wherein thefirst input of each of the plurality of Gm cells is in communicationwith the first inputs of other ones of the plurality of Gm cells,wherein the output of each of the plurality of Gm cells is incommunication with the outputs of other ones of the plurality of Gmcells, and wherein each of the plurality of Gm cells is selectivelycontrollable in response to the controllable current signal appliedthereto to one of enable and disable each of the plurality of Gm cellsfor adjusting a combined Gm of the plurality of Gm cells, and wherein anadjustable capacitance is connected to the output of each of theplurality of Gm cells, the adjustable capacitance includes a pair ofgain elements, and the adjustable capacitance is adjustable based on acontrol signal applied at a common node of the pair of gain elements.53. The amplifier apparatus of claim 52, wherein each of the pluralityof Gm cells comprises at least one transistor.
 54. The amplifierapparatus of claim 53, wherein each of the plurality of Gm cellscomprises a pair of transistors.
 55. The amplifier apparatus of claim54, wherein each pair of transistors comprises (i) a pair of inputterminals, (ii) a pair of output terminals, and (iii) a pair of commonterminals connected together in communication with the controllablecurrent signal, and wherein each of the Gm cells includes first andsecond current sources respectively coupled to the pair of outputterminals.
 56. The amplifier apparatus of claim 54, wherein each of thepairs of transistors includes gates coupled to the common controlvoltage, and wherein each of the pairs of transistors includes sourcesand drains coupled together to receive the control controllable currentsignal.
 57. The amplifier apparatus of claim 52, wherein the Gm of eachof the plurality of Gm cells is substantially identical.
 58. Theamplifier apparatus of claim 52, wherein the Gm of at least one of theplurality of Gm cells is different than the Gm of other ones of theplurality of Gm cells.
 59. The amplifier apparatus of claim 52, whereineach of the plurality of Gm cells comprises a controllable currentsource to generate the controllable current signal to adjust the Gm ofthe Gm cell.
 60. The amplifier apparatus of claim 59, wherein thecontrollable current source of the Gm cell is in communication with thesecond input.
 61. An amplifier device with a controllable Gm,comprising: a plurality of Gm cells, each of the plurality of Gm cellscomprising at least one transistor, wherein the plurality of Gm cellsare arranged in parallel, wherein each of the plurality of Gm cellsincludes an input terminal, wherein the input terminal of each of theplurality of Gm cells is in communication with input terminals of otherones of the plurality of Gm cells, wherein each of the plurality of Gmcells includes an output terminal, wherein the output terminal of eachof the plurality of Gm cells is in communication with output terminalsof other ones of the plurality of Gm cells, and means for selectivelycontrolling each of the plurality Gm cells to enable at least one of theplurality of Gm cells for adjusting a combined Gm of the amplifierdevice in response to a controllable current signal, wherein anadjustable capacitance is connected to the output terminal of each ofthe plurality of Gm cells, the adjustable capacitance includes a pair ofgain elements, and the adjustable capacitance is adjustable based on acontrol signal applied at a common node of the pair of gain elements.62. The amplifier device of claim 61, wherein each of the plurality ofGm cells comprises a pair of transistors.
 63. The amplifier device ofclaim 62, wherein each pair of transistors comprises (i) a pair of inputterminals, (ii) a pair of output terminals, and (iii) a pair of commonterminals connected together in communication with the controllablecurrent signal, and wherein each of the Gm cells includes first andsecond current sources respectively coupled to the pair of outputterminals.
 64. The amplifier device of claim 62, wherein each of thepairs of transistors includes gates coupled to a common control voltage,and wherein each of the pairs of transistors includes sources and drainscoupled together to receive the controllable current signal.
 65. Theamplifier device of claim 61, wherein the Gm of each of the plurality ofGm cells is substantially identical.
 66. The amplifier device of claim61, wherein the Gm of at least one of the plurality of Gm cells isdifferent than the Gm of other ones of the plurality of Gm cells.
 67. Amethod of controlling Gm, comprising the steps of: providing a pluralityof Gm cells, wherein each of the plurality of Gm cells includes (i) atleast one first input in communication with a common control voltage,(ii) a second input in communication with a controllable current signal,and (iii) an output, wherein the plurality of Gm cells are arranged inparallel, wherein the first input of each of the plurality of Gm cellsis in communication with the first inputs of other ones of the pluralityof Gm cells, wherein the output of each of the plurality of Gm cells isin communication with the outputs of other ones of the plurality of Gmcells; and providing an adjustable capacitance connected to the outputof each of the plurality of Gm cells, wherein the adjustable capacitanceincludes a pair of gain elements, and the adjustable capacitance isadjustable based on a control signal applied at a common node of thepair of gain elements.
 68. The method of claim 67, wherein the Gm ofeach of the plurality of Gm cells is substantially identical.
 69. Themethod of claim 67, wherein the Gm of at least one of the plurality ofGm cells is different than the Gm of other ones of the plurality of Gmcells.
 70. A method of controlling Gm, comprising the steps of:providing a plurality of Gm cells, each of the plurality of Gm cellscomprising at least one transistor, arranging the plurality of Gm cellsin parallel, wherein each of the plurality of Gm cells includes an inputterminal, wherein the input terminal of each of the plurality of Gmcells is in communication with input terminals of other ones of theplurality of Gm cells, wherein each of the plurality of Gm cellsincludes an output terminal, wherein the output terminal of each of theplurality of Gm cells is in communication with output terminals of otherones of the plurality of Gm cells, and selectively controlling each ofthe plurality Gm cells to enable at least one of the plurality of Gmcells for adjusting a combined Gm of the plurality of Gm cells inresponse to a controllable current signal; and providing an adjustablecapacitance connected to the output of each of the plurality ofamplifier cells, wherein the adjustable capacitance includes a pair ofgain elements, and the adjustable capacitance is adjustable based on acontrol signal applied at a common node of the pair of gain elements.71. The method of claim 70, wherein the Gm of each of the plurality ofGm cells is substantially identical.
 72. The method of claim 70, whereinthe Gm of at least one of the plurality of Gm cells is different thanthe Gm of other ones of the plurality of Gm cells.
 73. An amplifierapparatus, comprising: a plurality of amplifier cells, wherein each ofthe plurality of amplifier cells includes (i) at least one first inputin communication with a common control voltage, (ii) a second input incommunication with a controllable current signal, and (iii) an output,wherein each of the plurality of amplifier cells has a transconductancefrom the input thereof to the output thereof, wherein each of theplurality of amplifier cells is selectively controllable in response tothe controllable current signal applied thereto to one of enable anddisable each of the plurality of amplifier cells for adjusting acombined transconductance of the plurality of amplifier cells from theinputs thereof to the outputs thereof, and wherein an adjustablecapacitance is connected to the output of each of the plurality ofamplifier cells, the adjustable capacitance includes a pair of gainelements, and the adjustable capacitance is adjustable based on acontrol signal applied at a common node of the pair of gain elements.74. An amplifier device, comprising: a plurality of amplifier cells,each of the plurality of amplifier cells comprising at least onetransistor, wherein the plurality of amplifier cells are arranged inparallel, and wherein each of the plurality of amplifier cells has atransconductance from an input thereof to an output thereof; and meansfor selectively controlling each of the plurality amplifier cells toenable at least one of the plurality of amplifier cells for adjusting acombined transconductance of the amplifier device in response to acontrollable current signal, wherein an adjustable capacitance isconnected to the output of each of the plurality of amplifier cells, theadjustable capacitance includes a pair of gain elements, and theadjustable capacitance is adjustable based on a control signal appliedat a common node of the pair of gain elements.